Announcing our first ever  MICRO TOP PICKS ISSUE!
bringing you the best work from major computer architecture conferences


IEEE Micro
November/December 2003
http://www.computer.org/micro/



Features

Guest Editors' Introduction: Micro's Top Microarchitecture Conferences
Charles Moore, Kevin W. Rudd, Ruby B. Lee, and

Checkpoint Processing and Recovery: An Efficient, Scalable Alternative to
Reorder
Haitham Akkary, Ravi Rajwar, and Srikanth T.

Runahead Execution: An Effective Alternative Large Instruction Windows
Onur Mutlu, Jared Stark, Chris Wilkerson, and Yale N. Patt

The Jrpm System for Dynamically Parallelizing Sequential Java Programs
Michael K. Chen and Kunle Olukotun

Scalable Vector Processors for Embedded Systems
Christoforos E. Kozyrakis and David A. Patterson

Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture
Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim,
Jaehyuk Huh, Doug Burger, Stephen W. Keckler, and Charles Moore

Temperature-Aware Computer Systems: Opportunities and Challenges
Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik
Sankaranarayanan, and David Tarjan

Dynamic Frequency and Voltage Scaling for a Multiple-Clock-Domain
Microprocessor
Grigorios Magklis, Greg Semeraro, David H. Albonesi, Steven G. Dropsho,
Sandhya
Dwarkadas, and Michael L. Scott

Measuring Architectural Vulnerability Factors
Shubhendu S. Mukherjee, Christopher T. Weaver, Joel Emer, Steven K.
Reinhardt, and Todd Austin

Transient-Fault Recovery for Chip Multiprocessors
Mohamed A. Gomaa, Chad Scarbrough, T.N. Vijaykumar, and Irith Pomeranz

Discovering and Exploiting Program Phases
Timothy Sherwood, Erez Perelman, Greg Hamerly, Suleyman Sair, and Brad
Calder

Addressing Workload Variability in Architectural Simulations
Alaa R. Alameldeen and David A. Wood

Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches
Changkyu Kim, Doug Burger, and Stephen W. Keckler

Token Coherence: A New Framework for Shared-Memory Multiprocessors
Milo M.K. Martin, Mark D. Hill, and David A. Wood

Transactional Execution: Toward Reliable High-Performance Multithreading
Ravi Rajwar and James Goodman

Speculative Synchronization: Programmability and Performance for Parallel
Codes
Jose F. Martinez and Josep Torrellas

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